Since a R/W line is not available on the cartridge connector, many bankswitch schemes that provide RAM distinguishes between read access and write access to the RAM through the use of different addresses. Specifically, the address space for RAM access is divided into two parts - the "reading" block and the "writing" block. Typically an offset is added to the address for write-access, and the original address used for read-access.
This is also why the amount of RAM accessible in these bankswitching schemes is half of the ROM size.
The separate addresses for read and write operations prevent the use of "read-modify-write" instructions (ASL, LSR, ROL, ROR, DEC, INC) with this kind of ram.
Moreover, the use of an address bit in place of the R/W line means that any access to one of the addresses in the "writing" block will cause a write operation, so even reading from one of those addresses will modify memory (the actual value written is undetermined, as in this case neither the CPU nor the RAM are driving the data bus).
The 6502 performs "dummy" memory fetches, whose data is discarded, to invalid addresses (for example with indexed addressing across page boundaries) as part of its normal operations and this can lead to memory corruption if the fetch happens in the writing block of the address space.
Relevant
see Bank Switching